Former Intel CEO Pat Gelsinger with a16z's Raghu Raghuram and Guido Appenzeller on the next wave of semiconductor innovation and the physical constraints shaping the AI buildout:

Drawing on his experience designing Intel's 386 and 486 processors, Pat explains how AI could transform chip design, but also why faster design alone won't solve the industry's biggest problems.

They examine the bottlenecks in manufacturing, memory bandwidth, advanced packaging, and power, and why today's explosion of specialized AI chips may eventually consolidate around a smaller number of architectures.

They also discuss the potential for new memory technologies, the shift from copper to optical networking, and why energy capacity could become a major constraint on AI growth.

Finally, they revisit Pat's VMware years to ask what virtualization might look like when infrastructure is built for agents rather than humans.

YouTube: https://youtu.be/1Q_7yU7FZ1k

1:05 Hired by Intel at 18
3:50 Arguing with Stanford professors
7:25 Will AI design the next gen chips?
8:45 Designing faster than fabs can build
11:55 Why GPUs are stuck with bad memory
13:40 Why 100 AI chips will collapse to a few
19:15 Agents make new chips cheap to run
22:10 No new memory chip since the 90s
27:20 Why 16-layer chip stacks are a fantasy
32:15 The physics that keeps memory next to compute
34:55 "I declared the death of copper"
38:05 AI traffic breaks the internet's design
42:40 "Energy capacity equals economic capacity"
46:25 The 130-year-old power war AI reopened
48:50 VMware for agents

@PGelsinger @RaghuRaghuram @appenz